1. Field of the Invention
The present invention relates to memory modules and more specifically, to dynamic random-access memory (“DRAM”) modules that have low profile or for implementation in low-profile applications. The present invention also relates to memory modules with a smaller connector or a reduced number of pins while maintaining sufficient power delivery and ground return.
2. Discussion of the Related Art
Electronic components are generally assembled into modules. Modules, for example, memory modules, may be physically and electrically coupled to a printed circuit board assembly (“PCBA”) to form an electronic assembly. These assemblies may then be incorporated into a variety of electronic systems such as computers, communication devices, and recreational devices, including desktops, laptops, notebooks, tablets, handhelds, servers, Internet appliances, mobile phones, televisions, video game consoles, compact disc players, MP3 players, and the like.
The main memory in personal computers, servers, and video game consoles, commonly utilizes dynamic random-access memory (“DRAM”). One advantage of DRAM is its structural simplicity: DRAM conventionally stores each bit of data in a separate capacitor. Thus, conventionally only one transistor and a capacitor are required per bit in DRAM as compared to four or six transistors in static random-access memory (“SRAM”). This allows DRAM to achieve very high densities. For example, billions of transistors and capacitors can fit on a single memory chip.
To further increase the memory capacity onto a memory module, single in-line memory modules (“SIMMs”) and dual in-line memory modules (“DIMMs”) have been developed where each module contains a number of memory chips on one PCBA. In a SIMM, the pins for communicating to the memory chips are located on the lower edge of the front and back surfaces of the SIMM, and these pins are redundant and connected, thereby providing a single line of communication paths between the module and a host system. In contrast, the contacts or pins on the lower edge of the front and back surfaces of a DIMM are not connected, providing two lines of communication paths between the module and a host system. For example, a DIMM has one communication path in the front surface and one communication path in the back surface. In turn, SIMMs and DIMMs are not interchangeable, have different sizes and require different types of sockets to be provided by the host system.
As consumers often desire smaller and more compact electronic devices, electronic manufacturers desire not just increased component capacity but also decreased component sizes. However, the smaller electronic devices challenge technology as they pit performance against size, requiring reduction, compaction or miniaturization of the electronic components to realize the size restrictions. Modifications to surface areas to DIMMs have been suggested. For example, there have been small outline dual in-line memory modules (“SODIMMs”). Also, micro dual in-line memory modules (“MicroDIMMs”) have smaller surface areas as compared to a conventional DIMM and a SODIMMs. MicroDIMMs has been roughly half size of the surface area of a conventional DIMM.
To increase components or parts compatibility, industries have formed standard setting bodies or associations to promote uniformity in certain component dimensions or functions. For example, JEDEC, formerly known as the Joint Electron Device Engineering Council, has standardized surface areas and numbers of pins for SIMMs and DIMMs. As shown in Table 1, JEDEC has established 200 pins as a ‘standard’ format for SODIMMs, and 214 pins as a ‘standard’ format for MicroDIMMs.
TABLE 1214-pin200-pin SODIMMMicroDIMM(related art)(related art)# of Pins200214
FIG. 1 is a chart reflecting the pin assignment for a 240-pin MicroDIMM module according to the related art. As shown in FIG. 1, the related art uses two hundred fourteen (214) pins for a MicroDIMM. More specifically, the related art has sixteen (16) pins are for core and input/output (“I/O”) power, fifty-six (56) pins for ground, and eleven (11) pins for no-connect. “DDR3” refers to double data rate three, where data can be transferred on both the rising and the falling edges of each clock signal between a host and the memory module.
Nonetheless, mechanical outlines of electronic components, such as the seating height of a module, has been a focus as each new generation of packaging must provide improved performance, while reducing or compacting package size. For example, laptops, notebooks and tablet devices, which are becoming increasing popular, are small and demand low profile and high performance. Thus, a particular need also continues to exist to reduce the size of the high-speed memory components necessary to support state-of-the-art software applications while maintaining or even improving memory performance. For example, a particular need exists to reduce device thickness while supporting faster data speed.